target: prerequisites
\trecipe | Basic rule structure |
all: target1 target2 | Default target |
.PHONY: clean test | Phony targets |
.DEFAULT_GOAL := target | Set default goal |
include other.mk | Include another makefile |
VAR = value | Recursive variable |
VAR := value | Simple variable |
VAR ?= value | Conditional (if not set) |
VAR += value | Append to variable |
$(VAR) or ${VAR} | Use variable |
export VAR | Export to sub-makes |
override VAR = value | Override command line |
$@ | Target name |
$< | First prerequisite |
$^ | All prerequisites |
$? | Prerequisites newer than target |
$* | Stem of pattern rule |
$(@D) / $(@F) | Target directory/file |
$(<D) / $(<F) | First prereq directory/file |
%.o: %.c | Pattern rule |
$(BUILD)/%.o: %.c | Pattern with directory |
%.o: %.c %.h | Multiple prerequisites |
$(subst from,to,text) | Substitute text |
$(patsubst %.c,%.o,$(SRCS)) | Pattern substitute |
$(strip text) | Strip whitespace |
$(findstring find,text) | Find string |
$(filter pattern,text) | Filter words |
$(filter-out pattern,text) | Filter out words |
$(sort list) | Sort and dedupe |
$(word n,text) | Get nth word |
$(words text) | Count words |
$(wildcard *.c) | Match files |
$(dir path/file.c) | Get directory |
$(notdir path/file.c) | Get filename |
$(suffix file.c) | Get suffix |
$(basename file.c) | Get basename |
$(addsuffix .o,$(FILES)) | Add suffix |
$(addprefix src/,$(FILES)) | Add prefix |
$(join list1,list2) | Join lists |
$(realpath path) | Get real path |
$(abspath path) | Get absolute path |
ifeq ($(VAR),value)
...
endif | If equal |
ifneq ($(VAR),value)
...
endif | If not equal |
ifdef VAR
...
endif | If defined |
ifndef VAR
...
endif | If not defined |
else | Else clause |
$(if condition,then,else) | Inline if |
$(or cond1,cond2) | Or condition |
$(and cond1,cond2) | And condition |
$(foreach var,list,text) | Foreach loop |
$(call func,arg1,arg2) | Call function |
define FUNC
...
endef | Define function |
$(eval $(call TEMPLATE,args)) | Eval expression |
$(shell command) | Run shell command |
@command | Silent (no echo) |
-command | Ignore errors |
+command | Run even with -n |
command1 && command2 | Chain commands |
command1; command2 | Sequential commands |
$(info message) | Print info message |
$(warning message) | Print warning |
$(error message) | Print error and exit |
make -n | Dry run |
make -j4 | Parallel jobs |
make -f other.mk | Use different makefile |
make VAR=value | Override variable |
make -C dir | Change directory |
make -k | Keep going on error |
make -B | Force rebuild all |
make --debug | Debug output |
CC := gcc | C compiler |
CFLAGS := -Wall -g | Compiler flags |
SRCS := $(wildcard *.c) | Source files |
OBJS := $(SRCS:.c=.o) | Object files |
TARGET := program | Output name |
$(TARGET): $(OBJS)
\t$(CC) -o $@ $^ | Link rule |
%.o: %.c
\t$(CC) $(CFLAGS) -c $< -o $@ | Compile rule |
clean:
\trm -f $(OBJS) $(TARGET) | Clean target |
install:
\tcp $(TARGET) /usr/local/bin | Install target |
test:
\t./run_tests.sh | Test target |
help:
\t@echo "Available targets" | Help target |